{"product_id":"9783030576813-hardware-architectures-for-pos","title":"Hardware Architectures for Post-Quantum Digital Signature Schemes","description":"\u003cmeta content=\"text\/html; charset=utf-8\" http-equiv=\"Content-Type\"\u003e\u003cp\u003e\u003cspan\u003e\u003cp\u003eThis book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification.  The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs.\u003cbr\u003e\u003c\/p\u003e\n\u003cp\u003e\u003c\/p\u003e\n\u003cp\u003e\u003c\/p\u003e\n\u003cp\u003e\u003c\/p\u003e\n\u003cp\u003e\u003c\/p\u003e\n\u003cp\u003e\u003c\/p\u003e\n\u003cp\u003e\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003eDescribes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;\u003c\/li\u003e\n\u003cli\u003eDemonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;\u003c\/li\u003e\n\u003cli\u003eEnables designers to build hardware implementations that are resilient to a variety of side-channels.\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003cbr\u003e\u003cbr\u003e\u003c\/span\u003e\u003c\/p\u003e","brand":"Rarewaves","offers":[{"title":"Default Title","offer_id":55729092133238,"sku":"9783030576813","price":91.27,"currency_code":"GBP","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0092\/7504\/8033\/files\/orig_34941274.jpg?v=1750904165","url":"https:\/\/www.rarewaves.com\/products\/9783030576813-hardware-architectures-for-pos","provider":"Rarewaves.com","version":"1.0","type":"link"}